FinTronic.com
Title
Fintronic USA: Super-FinSim Verilog Simulator
Description
Third party tools integrated with FinSim
Fintronic USA Inc. is a provider of high performance Electronic Design Automation (EDA) tools. These tools are crucial for the design of digital circuits. The first step in the design of a digital circuit is to formally describe the desired functionality of the circuit in a Hardware Design Language, such as Verilog HDL. This description of the circuit is used as input to a simulator which will enable the designer to find out whether the described circuit is indeed what is needed. If not the specification (in the form of the Verilog description) is modified until it becomes acceptable. Once satisfied with the functionality, the designer refines and details this description to lower levels of abstraction (the "register transfer level" and the "gate level"), with the ultimate goal of creating a very simple description of the circuit which can then be sent to the fabrication facilities where the actual silicon chips are produced. During this process of refining the description of the design, the design engineer has to continue to simulate the circuit to ensure that the original functionality is still maintained.
Given the increased complexity of modern day chips and the critical importance of market timing, the electronics industry is craving for increased verification throughput which can reduce the turnaround time of the design cycles. Fintronic USA addresses these issues by providing Super FinSim, which is one of the most accurate and fast Verilog simulators in the industry. The simulation speed is achieved by using a mixed compiled and interpreted event driven simulator in conjunction with the Enhanced Cycle Simulation Technology. The main gain in throughput is achieved by using FinFarm, the simulation farm management tool. Super FinSim is especially fit for being used in a simulation farm because it uses little memory and the results it produces are compact when compared with the competitionn.
Along with its Verilog simulators Fintronic USA provides other related EDA tools which help the design engineer during the design cycle such as FinCov, a code coverage tool that provides the user with feedback regarding the quality of the test vectors used to verify the digital circuit, by reporting how many times each line is executed. Another extremely useful tool is FinVA which allows users to syntactically and semantically verify a Verilog description and create an attributed intermediate format which can be used in conjunction with the FinVFI package to create any tool for Verilog analysis/synthesis/verification.
Contact
Administrative:
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- Foster City CA
- United States 94404
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- 999 999 9999
Registrant:
- Fintronic USA, Inc.
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- San Mateo CA
- United States 94402
